MCX A18 Essential Mainstream MCU Arm® Cortex® M33 with 240MHz and Rich Serial Peripherals

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框图

MCX A185 and A186 MCUs

MCX-A18 Block Diagram

Features

Core Platform

  • Arm® Cortex®-M33 240MHz

Processing Accelerators

  • SmartDMA, co-processor for applications such as parallel camera interface and keypad scanning

Memory

  • Single-bank Flash: Up to 1024 KB Flash with ECC (support one bit correction and two bits detection)
  • Cache Engine with 8 KB RAM
  • Up to 256 KB RAM of which 8 KB is shared with cache, configurable as up to 8 KB RAM with ECC (support one bit correction and two bits detection)
  • All RAM can be retained down to Deep Power Down mode
  • ROM

Peripherals

  • Advanced Motor Control
    • 2x FlexPWM each with 4 submodules, providing 16 complementary outputs of PWM (no Nanoedge module)
    • 2x Quadrature Encoder/Decoder (eQDC)
    • 2x AOI (AND/OR/Invert) module support up to 4 output triggers
  • Analog
    • 2x 16-bit ADC
      • 3.2 Msps in 16-bit mode, and 4 Msps in 12-bit mode
      • Up to 43 ADC Input channels total (depending on the package)
      • Integrated temperature sensor
    • 1 x 12-bit DAC
      • Up to 1 Msps
    • 2 x High-speed Comparators with 8 input pins and 8-bit DAC as internal reference
      • 1x LPCMP is functional down to Deep Power Down mode
    • 1x OPAMP without PGA
  • Timers
    • 5 x 32-bit standard general-purpose asynchronous timers/counters, which support up to four capture inputs and four compare outputs, PWM mode, and external count input. Specific timer events can be selected to generate DMA requests.
    • Low power timer
    • Frequency measurement timer
    • Windowed watchdog timer
    • Wake timer
    • Micro-tick timer (UTICK)
    • OS event timer
    • RTC timer without external 32KHz input
  • Communication Interfaces for Connectivity
    • 2x LPSPI, 4x LPI2C, 6x LPUART
    • 1x I3C
    • USB Full-speed (Device/Host) with on-chip FS PHY
    • 2x FlexCAN with FD
    • FlexIO
  • HMI
    • 4x44 segment LCD

Security

  • 128-bit Universal Unique Identifier (UUID) per device in accordance with IETF's RFC4122 version5 specification
  • Device lifecycle management
  • Flash read/write/execute permission protect by MBC and lockable
  • Implicit-protected Flash Region (IFR)
  • Security Monitoring
    • Code Watchdog for code flow integrity checking
    • Glitch attack resistant keyed access (Glikey) to security sensitive registers
    • 6x Passive anti tamper detect

Packaging

  • WFBGA169 7x7mm, LQFP144 20x20mm, LQFP100 14x14mm, LQFP64 10x10mm

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