Layerscape LX2162A LX2122A LX2082A Processors | NXP 半导体

产品
处理器和微控制器
Arm处理器
Layerscape处理器
- LA12xx
- LA9310
- LS1012A
- LS1020A
- LS1021A
- LS1024A
- LS1028A
- LS1043A
- LS1046A
- LS1088A
- LS2084A
- LS2088A
- LX2160A, LX2120A, LX2080A
- LX2162A, LX2122A, LX2082A
LX2162A, LX2122A, LX2082A

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The LX2162A (also known as “LX2-Lite”) processor squeezes the processing capability of the popular LX2160A device into a package that is nearly one quarter the size. It combines the low power of the 16nm FinFET process technology and sixteen Arm^® Cortex^®-A72 cores with data path acceleration optimized for L2/3 packet processing, security offload and robust traffic management and quality of service.

This advanced processor is suitable for small boards such as network interface cards, COM Express Type 7 modules, OCP3 mezzanine cards and custom daughter cards. It retains LX2160A’s 16 Cortex-A72 cores, 50 Gbit/s security engine and 88 Gbit/s data compression engine. It has 12 SerDes lanes at up to 25 Gbit/s, which can support four 25 Gbit Ethernet and x8 PCIe Gen3 simultaneously, among many other combinations.

For Edge Computing, this processor offers outstanding computing performance with a powerful packet offload and Ethernet controllers. In one device you can have high-end, high-speed communications, with low-speed peripherals such as sensors and the computing power to process and act upon all received information.

Layerscape processors are part of NXP's EdgeVerse™ edge computing platform.

产品详情

框图

Layerscape LX2162A Block Diagram

Layerscape LX2162A Block Diagram

获取框图PDF

Features

16-64-bit Armv8 Cortex-A72 CPU cores, running up to 2.0 GHz
16 MB cache
12 SerDes lanes, operating up to 25 GHz
Up to 12 Ethernet ports
Supported Ethernet speeds include 1, 2.5, 10, 25, 40 and 50 Gbit/s
105 Gbit/s Layer 2 Ethernet switch
Up to 12 PCIe Gen3 lanes, supporting three ports, as wide as x8
50 Gbit/s security accelerator
88 Gbit/s data compression/decompression engine
Package: 23x23mm, 1150 pins
DDR4 72b including ECC, to 2900 MT/s, maximum capacity of 32 GB

对比表

Layerscape LX2162A Family Members

	LX2162A	LX2122A	LX2082A
Cores	16	12	8
L2 cache	8MB	6MB	8MB
SerDes	12 lanes at up to 25 GHz
PCIe^®	3 x Gen3, max width of x8
DDR	DDR4, 2900 MT/s, 32 GB capacity
Platform cache + PEB	10MB
Ethernet	105 Gbit/s L2 switch, supporting combinations of 12 ports of 1, 2.5, 10, 25, 40 and 50 Gbit Ethernet
Security	50 Gbit/s
Data Compression Engine	88 Gbit/s
Package	23 x 23 mm, 1150 pins

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购买/参数

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文档

快速参考恩智浦文档类别

1-10 / 23 文件

紧凑列表

LX2162A Reference Manual[LX2162ARM]

PDFDec 14, 2021版本更新 1
LX2160A Security (SEC) Reference Manual[LX2160ASECRM]

PDFJul 20, 2020版本更新 0
LX2160A Family Data Path Acceleration Architecture, Second Generation (DPAA2) Low-Level Hardware Reference Manual[LX2160ADPAA2RM]

PDFJun 18, 2020版本更新 0

Hardware and Layout Design Considerations for DDR4 SDRAM Memory Interfaces[AN5097]

PDFJul 28, 2023版本更新 3
Enabling 10GBase-KR on QorIQ Platforms Application Note[AN12750]

PDFJul 29, 2022版本更新 1
Avoiding WRIOP FIFO Depletion for 100 Gbps Bandwidth Configuration on LX2 Platforms[AN13684]

PDFJul 5, 2022版本更新 0
AN5407, LX2160A and LX2162A Design Checklist, Application Note[AN5407]

PDFApr 22, 2022版本更新 2
将Layerscape器件上的FlexTimer串接起来[AN13608]

PDFApr 4, 2022版本更新 0
Ethernet Backplane Driver Support Application Note[AN12572]

PDFNov 26, 2021版本更新 4
在Layerscape平台上部署Xen[AN13138]

PDFMar 8, 2021版本更新 0
Recommendations for SD Connections to 1.8 V SDHC Interfaces Data Sheet[AN13031]

PDFFeb 5, 2021版本更新 0
Optimizing Serial Interface Equalization Settings for 25 GbE on LX216xA Processor Application Note[AN12950]

PDFDec 2, 2020版本更新 1
Optimizing Memory Copy Routines Application Note[AN12628]

PDFNov 6, 2019版本更新 0
General soldering Temperature Process Guidelines[AN3300]

PDFAug 16, 2017版本更新 1
AN11979, DPAA2 Ethernet Switch and Edge Virtual Bridge - Application Note[AN11979]

PDFJul 18, 2017版本更新 0
PBL Configuration using QCVS Application Note[AN5260]

PDFFeb 24, 2016版本更新 0
AN5199, Key Concepts for the Transition from DPAA1 to DPAA2 - Application Note[AN5199]

PDFDec 22, 2015版本更新 0
AN5125, Introduction to Device Trees - Application Note[AN5125]

PDFSep 3, 2015版本更新 0
SerDes Reference Clock Interfacing and HSSI Measurements Recommendations[AN4311]

PDFMay 13, 2011版本更新 Rev. 0
DDR Interleaving for PowerQUICC and QorIQ Processors[AN3939]

PDFJun 30, 2010版本更新 1
Solder Joint Temperature and Package Peak Temperature[AN3298]

PDFAug 2, 2006版本更新 0

Layerscape LX2162A/LX2122A/LX2082A Data Sheet[LX2162A]

PDFAug 24, 2021版本更新 1

Layerscape^® LX2162A Communications Processor[LX2162AFS]

PDFOct 1, 2020版本更新 2

设计资源

设计文件

收到完整的详细信息。 请参阅产品足迹及更多信息电子CAD文件.

硬件

快速参考恩智浦板类型.

2 硬件

评估板和开发板
QorIQ LX2160A开发板亮点

LX2160A-RDB
仿真器、探测器、编程器
面向CodeWarrior TAP的QorIQ LS处理器调试器接头
正常供应

CWH-CTP-CTX10-YE

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