QorIQ® T1042

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The QorIQ T1042 quad-core and T1022 dual-core communication processors support two or four integrated 64-bit e5500 Power Architecture^® processor cores with high-performance data path acceleration architecture (DPAA) and network peripheral interfaces required for networking and telecommunications.

The T1 family of devices is a scalable, pin-compatible family of communications processors – and offers pin-compatible migration up to the higher-performance QorIQ T2081 device.

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产品详情

框图

QorIQ T1040/20 and T1042/22 Communication Processors

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Features

Core Complex

Two or four e5500 cores, built on Power Architecture technology
Up to 1.4 GHz with 64-bit ISA support
Three levels of instructions: user, supervisor, hypervisor
Hybrid 32-bit mode to support legacy software and transition to a 64-bit architecture
256 KB backside L2 cache

Networking Elements

SerDes
- Eight lanes at up to 5 Gbps
- Supports SGMII, QSGMII, PCIe and SATA
Ethernet Interfaces
- Up to five Gigabit Ethernet interfaces

Accelerators and Memory Control

32/64-bit DDR3L/4 SDRAM memory controller with ECC support
- Up to 1600 MT/s
DPAA Incorporating acceleration for the following functions Packet parsing, classification, and distribution
- Queue management for scheduling, packet sequencing and congestion management
- Hardware buffer management for buffer allocation and de-allocation
- Integrated security acceleration (SEC)
- Signature detection (PME)

Basic Peripherals and Interconnect

CoreNet^{^®} platform cache
- 256 KB shared platform cache
Hierarchical interconnect fabric
- CoreNet fabric supporting coherent and non-coherent transactions with prioritization and bandwidth allocation amongst CoreNet endpoints
Additional peripheral interfaces two Serial ATA (SATA 2.0) controllers
- Two high-speed USB 2.0 controllers with integrated PHYs
- Enhanced secure digital host controller (SD/MMC/eMMC)
- Enhanced serial peripheral interface (eSPI)
- Two I^{2^{C controllers}}
- Four UARTS
- Integrated flash controller supporting NAND and NOR flash
DMA
- Dual four channel
- Up to 5x 1 Gbps Ethernet MACs as part of DPAA
QUICC Engine^®
- Support for legacy protocols TDM, HDLC, UART and ISDN
High-speed peripheral interfaces
- Four PCI Express^® 2.0 controllers

Additional Features

Support for hardware virtualization and partitioning enforcement
- Extra privileged level for hypervisor support
QorIQ^{^®} trust architecture
- Secure boot, secure debug, tamper detection, volatile key storage
This product is included in Our product longevity program, with assured supply for a minimum of 10 years after launch

对比表

	T1020	T1022	T1040	T1042	T2081
CPU	2 e5500	2 e5500	4 e5500	4 e5500	4 e6500 (dual-threaded)
Core Frequency	1200-1400MHz	1200-1400MHz	1200-1400MHz	1200-1400MHz	1500-1800MHz
DDR I/F	1x DDR3L/4 to 1600MT/s	1x DDR3L/4 to 1600MT/s	1x DDR3L/4 to 1600MT/s	1x DDR3L/4 to 1600MT/s	1x DDR3/3L to 2133MT/s
Ethernet (with IEEE1588v2)	8-Port GE Switch + 4x 1GE	5x 1GE	8-Port GE Switch + 4x 1GE	5x 1GE	2x 1/10GE + 6x 1GE
SERDES	8 lanes (5GHz)	8 lanes (5GHz)	8 lanes (5GHz)	8 lanes (5GHz)	8 lanes (10GHz)
Package	Pin Compatible

文档

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1-5 / 23 文件

^简介
QorIQ^® T系列T1020/22和T1040/42处理器 - 简介亮点

PDF版本 1289.7 KBT1FAMILYFS中文, 英语
^数据手册
QorIQ^® T1042, T1022 Data Sheet

PDF版本 2Jun 29, 20151.5 MBT1042英语
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^参考手册
QorIQ T1040 Reference Manual

PDF版本 2Jun 5, 202021.2 MBT1040RM英语
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^参考手册
QUICC Engine Block Reference Manual with Protocol Interworking - Reference Manual

PDF版本 9May 3, 201813.4 MBQEIWRM英语
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^参考手册
e5500RM, e5500 Core Reference Manual with Updates - Reference Manual

PDF版本 4Jul 28, 20153.7 MBE5500RM英语
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^参考手册
T1040DPAArm, T1040 QorIQ Data Path Acceleration Architecture (DPAA) Reference Manual - Reference Manual

PDF版本 0Feb 3, 201518.4 MBT1040DPAARM英语
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^参考手册
T1040SECRM, T1040 Security (SEC) Reference Manual - Reference Manual

PDF版本 0Jan 22, 201512.8 MBT1040SECRM英语
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^应用笔记
Hardware and Layout Design Considerations for DDR4 SDRAM Memory Interfaces

PDF版本 3Jul 28, 20231.1 MBAN5097英语
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^应用笔记
U-Boot Bring Up using CodeWarrior on T1040D4RDB Application Note

PDF版本 0Apr 9, 201810.9 MBAN12105英语
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^应用笔记
AN4829, Common Board Design Between T1024 and T1022 Processor - Application Note

PDF版本 0Jul 24, 2017401.1 KBAN4829英语
^应用笔记
AN5079, QorIQ P1 Series to T1 Series Migration Guide - Application Note

PDF版本 0Jul 24, 2017349.9 KBAN5079英语
^应用笔记
SerDes Configuration and Validation Tool Companion Application Note

PDF版本 2Jan 29, 2016426.5 KBAN5119英语
^应用笔记
AN4825, T1040 Family Design Checklist - Application Note

PDF版本 1Apr 9, 2015862.5 KBAN4825英语
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^应用笔记
AN4848, Simple Program to Confirm PCIe Connectivity - Application Notes

PDF版本 0Jan 21, 20141.2 MBAN4848英语
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^应用笔记
AN3940, Hardware and Layout Design Considerations for DDR3 SDRAM Memory Interfaces - App Note

PDF版本 6Nov 25, 2013547.7 KBAN3940英语
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^应用笔记
SerDes Reference Clock Interfacing and HSSI Measurements Recommendations

PDF版本 Rev. 0May 13, 2011577.2 KBAN4311英语
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^应用笔记
DDR Interleaving for PowerQUICC and QorIQ Processors

PDF版本 1Jun 30, 2010717.3 KBAN3939英语
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^应用笔记
PowerQUICC™ HDLC Support and Example Code

PDF版本 0Nov 10, 2009496.6 KBAN3966英语
^用户指南
Spectre and Meltdown Updates for Power ISA Cores

HTMLNov 14, 2019SPECTRE-MELTDOWN-POWER-ISA-DOC英语
^产品简介
T1040/20 and T1042/22 Product Brief

PDF版本 0Apr 2, 2014222.3 KBT1040PB英语
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^支持信息
FSLNISTCAVP, NIST Crypto Algorithm Validation Program Certifications for NXP^® Cryptographic Accelerators - White Paper

PDF版本 1.9Oct 28, 2016303.5 KBFSLNISTCAVP英语
^白皮书
Speculative Execution Vulnerabilities and Mitigations on NXP PowerPC Processors White Paper

PDF版本 0Jan 30, 2020317.1 KBSPECTREPPCWP英语
^白皮书
QORIQPMWP, QorIQ Power Management - White Paper

PDF版本 0Mar 30, 20171.4 MBQORIQPMWP英语

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设计资源

设计文件

1 设计文件

^模型
BDSL file for T1020/22

BSDL版本 R1AFeb 20, 2019 14:25:00112.8 KBT1020-T1022-BSDL
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