12-Bit Bus Switch/Multiplexer for DDR4-DDR3-DDR2 Applications

CBTV24DD12ET
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CBTV24DD12 Block Diagram

CBTV24DD12 Block Diagram

Features

Topology

  • 12-bit bus width
  • 1:2 switch/MUX topology
  • Bidirectional operation
  • Simple CMOS select pins (SEL0, SEL1)
  • Simple CMOS enable pin

Performance

  • 3200 MT/s throughput
  • 7.4 GHz bandwidth (for both single-ended and differential signals)
  • Low ON insertion loss
  • Low return loss
  • Low crosstalk
  • High OFF isolation
  • POD_12, SSTL_12, SSTL_15 or SSTL_18 signaling
  • Low RON (8 Ω typical)
  • Low ΔRON (<1 Ω)

General attributes

  • 1.8 V / 2.5 V / 3.3 V supply voltage operation
  • Very low supply current (600 µA typical)
  • Back current protection on all the I/O pins of these switches
  • ESD robustness exceeds 2.5 kV HBM, 1 kV CDM
  • Available in TFBGA48 package, 3.0 mm × 8.0 mm × 1.0 mm size, 0.65 mm pitch, Pb-free/Dark Green

Target Applications

  • DDR4/DDR3/DDR2 memory bus systems
  • NVDIMM module
  • Systems requiring high-speed multiplexing
  • Flash memory array subsystem

部件编号包含: CBTV24DD12AET, CBTV24DD12ET.

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