紧凑列表
This integrated circuit is intended for GPS receiver applications. The dual conversion design is implemented in NXP’s low–cost high performance MOSAIC 3™ silicon bipolar process and is packaged in a low–cost surface mount LQFP–48 package. In addition to the mixers, a VCO, a PLL and a loop filter are integrated on–chip. Output IF is nominally 9.5 MHz.
快速参考恩智浦 文档类别
2 文件
紧凑列表
安全文件正在加载，请稍等