24-bit Digital Signal Processor

DSP56306
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The ROM-based DSP56306 is designed to support multifunction wireless and embedded DSP applications. In addition to the large on-chip ROM spaces, the DSP56306 also has a ROM patch feature that facilitates updates to the mask-program ROM-based on-chip software. The DSP56306 includes a triple timer module, Host Interface (HI08), an Enhanced Synchronous Serial Interface (ESSI), and a Serial Communications Interface (SCI). The DSP56300 core family includes a Phase Lock Loop (PLL), External Memory Interface (EMI), Data Arithmetic Logic Unit (Data ALU), 24-bit addressing, instruction cache, and DMA. The DSP56306 offers 66 MIPS at 3.0-3.6 volts. TEMPORAL 2.

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