VDK Debug perspective

The VDK Debug perspective becomes available after the Synopsys simulation tools are installed. This perspective presents the user interface of the Synopsys VP Explorer tool.


VDK Debug Perspective

The Design Browser view displays the hierarchy of module instances and tracks the state of a running simulation. The view communicates directly with the simulator when updating the states of modules, ports, and signals. Whenever the simulation is suspended, the view displays the actual values of ports, signals, and variables in a tree structure.
The Breakpoints view tracks the list of breakpoints set by the user:
The VP Disassembly view displays the program currently executed on a virtual prototype representing the target processor. If the virtual prototype contains the model of the processor that has been instrumented, the VP Disassembly view shows the instructions being executed, with the associated disassembled code and symbols, and enables you to set breakpoints on the running program.

The Simulation Output view displays the output of the running simulation. You can copy, paste and find strings in the output. By default, this view is cleared each time a new simulation is started. This behavior can be toggled off using the Clear Simulation Output on simulation start option.