The Double Data Rate (DDR) Buffer element allows you to use the specified allocated memory of the host CPU.
The final DDR buffer is read and processed by the host application project or the next processing node: APEX2 (for example, executing the APEX FAST9 corner detector) and DCU (displaying processed camera input to the screen). They are not displayed on the graph (consumer = 0).
The DDR buffer can be connected to the SRAM buffer using the FastDMA (FDMA) element. Buffers can be linked in both directions: SRAM -> FDMA -> DDR and DDR -> FDMA -> SRAM.
The DDR Buffer element has the following properties:
- Name - Name of the ISP buffer. The name must be unique and valid C identifier not exceeding 63 characters.
- Data Type - Type of the data transferred by the buffer.
- Producer - The engine output port connected using the FDMA transfer.
- Line Increment - Increment of the current relative index.
- Stride [Bytes] - The stride value.
- XSize [Pixels] - The horizontal dimension.
- YSize [Lines] - The vertical dimension.