Analog-to-Digital Converter Module

In Full Chip Simulation (FCS) mode, this module simulates all functionality of the Analog-to-Digital Conversion ( ADC) module, including data input on all ADC channels, flag polling, interrupt operation, and the bus and CGMXCLK reference clock sources. FCS mode uses the buffered input structure to simulate the ADC inputs. You can queue up to 256 data values. To queue the ADC Input Data, use the ADDI command in the command prompt. If the data parameter is given, the value is placed into the next slot in the input buffer. Otherwise, if no parameter is provided, a window is displayed with the input buffer values. Input values can be entered while the window is open. An arrow points to the next value to be used as input to the ADC. The conversion takes place after a proper value is written to the ADC Status and Control register. Once the conversion occurs, the arrow moves to the next value in the ADC Buffer.

Figure 1. ADC IN Buffer Display

The ADCLR command can be used at any point to flush the input buffer for the ADC simulation.

After the conversion is complete, the first queued value is passed from the data buffer into the ADC data register. It can be observed in the Memory window by displaying the memory location corresponding to the ADC data register.

Figure 2. Memory Component Window

When the conversion is complete, FCS sets the appropriate flag. If interrupts are enabled, the Program Counter changes flow to the interrupt routine (as defined in the vector space of the MCU).

• ADC Module Commands
  
• ADDI Command
  
• ADCLR Command