IICDI Command

The IICDI command lets you input data into a buffer of data to shift into the IIC module when it receives data from an external device. If a data parameter is given, the value is placed into the next slot in the input buffer. Otherwise, if no parameter is given, a window is displayed with the input buffer values. Input values can be entered while the window is open. The maximum number of input values is 256. This command is useful for either inputting response data from a slave target or for inputting data packets from an external master. Note that when the microprocessor attempts to read an acknowledge from an external device, and the next value in the buffer is neither ACK nor NACK, the microprocessor automatically receives an ACK signal (i.e. assumes ACK unless NACK is specified).

Syntax
  >gdi IICDI [<n>][START][STOP][ACK][NACK]

Where: � <n> indicates the value to be entered into the next location in the input buffer

� START indicates the incoming START signal

� STOP indicates the incoming STOP signal

� ACK corresponds to ACK signal

� NACK corresponds to NACK signal

Note: For a detailed description of the IIC protocol and a proper way to configure the IIC module, refer to the Freescale user manual for your microprocessor.
Example
  >gdi IICDI  

Pulls up the data window with all the input values

  >gdi IICDI 22 33  

This is an example of data being returned from a slave device. Once the MCU transmits a start signal and the target address, it receives an ACK from the slave device. An ACK is implied unless a NACK is specified via the IICDI command. The next two data bytes read are 22 and 23. If the microprocessor attempts to read another byte, it gets an $FF value followed by a NACK signal (NACK because nothing remains in the input buffer). The receiving device then generates a STOP signal. A more exact input from a device designed to return two bytes is:

  >gdi IICDI ACK 22 ACK 23 NACK  

IIC in master mode transmits to a slave:

� If the slave device acknowledges all output bytes of the transmitting device, there is no need to specify an input packet. If the master device is going to transmit an address and two bytes, the following packet is equivalent to no packet:

  >gdi IICDI ACK ACK ACK  

� If, however, the slave receiver is designed to generate a NACK signal after the second received data byte, the proper response packet is:

  >gdi IICDI ACK ACK NACK  

� The address result being the first ACK, the first data result being the second ACK, and the second data byte being the NACK.

IIC in MASTER mode is not acknowledged by any Slave:

  >gdi IICDI NACK  

� If the NACK signal is entered before the master device transmits a START signal, then the master device gets a NACK when it tries to read an acknowledge after the address is output. The master device then generates a STOP signal and releases the BUS.

IIC in SLAVE mode receives a Write from an external Master:

This example is for an external master that is writing to the microprocessor configured to simulate the slave mode operation. The packet contains both START and STOP signals which puts the simulated device into the slave mode.

  >gdi IICDI START 55 AA 22 STOP  

This input adds five values to the input queue, which is a packet from an external master, including the following procedure values:

� A start signal comes in

� The address $55 comes in specifying a write (slave receive). The Address Register in the current simulated device has been previously set to $55

� The data byte $AA comes in

� The data byte $22 comes in

� A STOP signal comes in