In Full Chip Simulation (FCS) mode, this module simulates all functionality of the Inter-Integrated Circuit (IIC) module including:
- Flag polling
- Interrupt enabled mode
- Transmission and reception of external data
- Master and slave modes of operation
- START and STOP signal generation detection
- Acknowledge bit generation detection
FCS mode uses the buffered input/output structure to simulate IIC inputs. You can queue up to 256 data bytes into the input buffer. The output buffer of the USB module can also hold 256 output bytes. To queue the IIC Input Packets, use the IICDI <...> command in the command prompt. For a more detailed description of the command, refer to the IIC Commands section. If the IIC packet parameters are properly defined, the packet is placed into the next slot in the input buffer. Otherwise, if no parameters are provided, an IIC Input Buffer window is displayed.
You can enter different IIC packet parameters while the window is open, including START, STOP, ACK, NACK and data bytes. An arrow points to the next byte to be used as input to the IIC. The data from the IIC input buffer is written to the IIC module registers once the IIC module is turned on and properly configured for receiving data from an external IIC device. Once simulation of the data transmission is over, the arrow moves to the next value in the IIC Input Buffer.
The IIC data input/output log buffer simulation lets you gain access to the past 256 IIC data bytes that have been shifted in and out of the module. To bring up the IIC IN/OUT LOG buffer dialog box, use the IICDO command.
The IICCLR command may be used at any point to flush the input as well as input/output log IIC buffers. After the IIC simulated input is received, the first queued-in data byte is passed from the data buffer into the corresponding IIC module registers. It can be observed in the Memory window by displaying the appropriate register location there.
You can also observe different IIC flags in the Memory window. If you run the module in Flag Polling mode, poll the flag corresponding to the expected IIC event. If the IIC interrupts are enabled, FCS jumps to an appropriate subroutine as long as the IIC interrupt vectors are properly defined.