Register Offset Indexed from X, Y, or SP (REG,IDX)

A CPU data registers Di is added to X, Y, or SP to form the effective address of the operand. This indexed addressing sub-mode allows a program-controlled offset which can change during execution of the program. For registers D0, D1, D6, and D7 the register is treated as an unsigned value. For D2~D5 the register is treated as a signed value.

Listing: Example - Register Offset Indexed


main:
LD D0,#$300

LD D1,#$400

LD X,#$600

LD D6,(D0,X)

LD Y,#$1000

ST D6,(D1,Y)