A 7-bit (or 15-bit) twos complement relative offset is included in the instruction opcode. The relative offset is computed by adding the signed offset to the address of the first byte of object code for the current instruction.
main: LD D0,#10 CMP D0,#10 BEQ foo ... foo:
REL addressing mode comprises of 7-bit signed relative offset and REL1 mode has 15-bit signed relative offset.