peephole_enable_16bit_load_store_inst

Enables use of 16-bit load/store instructions instead of 32-bit load/store instructions.

Syntax
#pragma peephole_enable_16bit_load_store_inst on | off | 
  reset
  
Remarks

This peephole optimization will replace the 32 bit load/store instructions with 16 bit load/store instructions.

This pragma is on by default under size optimization and off under speed optimization.

Please note that this optimization is applicable only when VLE instruction set is enabled.

Example

Converts the below pattern

        e_stb   r0,28(r3)
  
        e_stb   r0,32(r3)
  
        e_stb   r4,36(r3)
  
        e_stb   r4,40(r3)
  
        e_stb   r4,41(r3)
  
        e_stb   r4,42(r3)
  
        e_stb   r4,43(r3)
  

to

   e_add16i r3,r6,28
  
   se_stb   r0,0(r3)
  
   se_stb   r0,4(r3)
  
   se_stb   r4,8(r3)
  
   se_stb   r4,12(r3)
  
   se_stb   r4,13(r3)
  
   se_stb   r4,14(r3)
  
   se_stb   r4,15(r3)