Code generation Pragmas

This section describes the code generation pragmas.

• alignment_metrowerks
  Determines which structure alignment policy to use.
• altivec_codegen
  Controls the use Power Architecture AltiVec™ instructions during optimization.
• altivec_model
  Controls the use Power Architecture AltiVec™ language extensions.
• altivec_pim_warnings
  Controls how the compiler translates literal values for AltiVec vectors.
• altivec_vrsave
  Controls which AltiVec™ registers to save to the stack between function calls.
• cats
  Controls the generation of relative .rela.* sections in the .elf file.
• disable_registers
  Controls compatibility for the ISO/IEC standard library function setjmp() .
• e500_floatingpoint
  Generates single-precision floating point instructions for the Power Architecture e500 SPE (Signal Processing Unit) APU (Auxiliary Processing Unit).
• e500v2_floatingpoint
  Generates double-precision floating point instructions for the Power Architecture e500v2 SPE (Signal Processing Unit) APU (Auxiliary Processing Unit).
• function_align
  Aligns the executable object code of functions on a specified byte boundary.
• gen_fsel
  Controls the use of the floating-point select instruction, fsel .
• gen_isel
  Controls the use of the integer select instruction, isel .
• gprfloatcopy
  Takes advantage of simpler alignment restrictions for copying floating point data.
• has8bytebitfields
  Controls the use of bitfields that fit in the long long data type.
• interrupt
  Deprecated. To avoid C++ parsing ambiguities and other possible inadvertent errors, use __declspec(interrupt) instead.
• legacy_struct_alignment
  Avoids the possibility of misaligned load or store instructions caused by promoting the alignment of global and local data objects to a minimum of 4 bytes.
• merge_float_consts
  Each floating point constant is placed in a unique variable such that the linker will merge floating point constants which have the same value.
• min_struct_align
  Increases aggregate alignments for better memory access.
• misaligned_mem_access
  Controls how the compiler copies structures that are not aligned to 4-byte boundaries.
• no_register_save_helpers
  Controls the save and restore registers without calling helper functions.
• options
  Specifies how to align structure and class data.
• pool_data
  Controls whether data larger than the small data threshold is grouped into a single data structure.
• ppc_lvxl_stvxl_errata
  Controls the instruction encoding for the lvxl and stvxl instructions on the Power Architecture 745 x processors to correct a bug in the processors.
• profile
  Controls the generation of extra object code for use with the CodeWarrior profiler.
• read_only_switch_tables
  Controls where tables for switch statements are placed in object code.
• strict_ieee_fp
  Controls generation of executable code that conforms to the IEEE floating point standard.
• read_only_vtable_RTTI
  Controls placing vtable and RTTI in a ready-only section.
• switch_tables
  Controls the generation of switch tables.
• uchar_bool
  Controls the size of the _Bool and bool data types.
• use_lmw_stmw
  Controls the use of lmw and stmw instructions.
• ushort_wchar_t
  Controls the size of wchar_t .
• vec2x32float_align_4
  Controls the alignment of type __vec2x32float__ .
• z4_16bit_cond_branch_errata_5116
  Controls the use of 16-bit conditional instructions.
• z4_mtlr_se_rfi_errata_26553
  Ensures that there are at least three instructions between the mtlr and the se_rfi .