Overview of the 56800E Architecture

The 56800/E processors are member of the 56800x family of digital signal microcontrollers. The 56800x instruction set is targeted for efficient microcontroller code generation and DSP (Digital Signal Processing). The 56800/E are digital signal processors, because they both have a microcontroller and DSP.

Microcontroller instructions include:

Bit manipulation instructions
Flexible branching instructions
Absolute (global) addressing modes to maximize control code density.

DSP features include:

Single cycle MAC (Multiply-Accumulate)
Separate address register file
Separate data/program memory spaces,
Multiple addressing modes, including pointer post-update addressing modes.

The C compiler attempts to target the post-update addressing modes in loops. In this chapter, we describe the programming style that promotes the selection of the post-update addressing modes.

The 56800x family is a native 16-bit machine - data and addresses are 16 bits wide. The 56800/E extends the address bus width to 24-bits (called the large data model), allowing a wider range of data addresses, but at a cost of performance and code density. In this chapter, we discuss the techniques used to minimize the cost of enabling the large data model.

Note: Although ANSI-C data types are fully supported, in this chapter, we show that the best code is generated when the programmer favors the native data type size (16-bits).