Arithmetic shift of 32-bit value by a specified shift amount. If the shift count is positive, a right shift is performed. Otherwise, a left shift is performed. Saturation may occur during a left shift. When an accumulator is the destination, zeroes out the LSP portion.
OMR's SA bit was set to 1 at least three cycles before this code, that is, saturation on data ALU results enabled.
Word32 L_shr(Word32 lval2shft, Word16 s_shftamount)
long result, l = 0x24680000; short s2= 1; result = L_shrtNs(l,s2); // Expected value of result: 0x12340000