Arithmetic shift of 16-bit value by a specified shift amount. If the shift count is positive, a left shift is performed. Otherwise, a right shift is performed. Saturation may occur during a left shift. When an accumulator is the destination, zeroes out the LSP portion.
OMR's SA bit was set to 1 at least three cycles before this code, that is, saturation on data ALU results enabled.
Word16 shl(Word16 sval2shft, Word16 s_shftamount)
short result; short s1 = 0x1234; short s2 = 1; result = shl(s1,s2); // Expected value of result: 0x2468