The ROM and RAM ranges depend on the target processor. The RESERVED_RAM size for pseudo registers storage is by default 5 bytes.
Component implementation details:
ExtInt,TimerInt,FreeCntr8,FreeCntr16,FreeCntr32,RTIshared, InterruptVector,TimeDate
Derivatives of the RS08 family with processor core version 2 support a single global interrupt vector. The interrupt doesn't support a vector table lookup mechanism as used on the HC(S)08 devices. It is the responsibility of a routine servicing the global interrupt to poll the system interrupt pending registers (SIPx) to determine if an interrupt is pending. To support the single global interrupt vector Processor Expert defines a set of emulated interrupt vectors for each HW module, which duplicates interrupt vectors of the HCS08 family. When an emulated interrupt vector is used by a component a call to the appropriate interrupt service routine is added to the global interrupt service routine. The global interrupt vector routine performs check of the SIPx registers to determine if an interrupt is pending. The order in which the SIPx registers are polled is affected by priority of the emulated interrupts. For priority settings, see Processor Expert priority system topic for details.
The GetVal and GetDir methods are always implemented as macros. Optimization for property (BitIO, BitsIO) does not influence the generated code.
A conversion time in the Conversion time dialog is calculated for the worst case.