Setting debug port clock frequency

The debug port on your target system is a synchronous interface clocked by the TCK signal. The base frequency is set by the debugger and can be adjusted with preferences in the debugger.

Note: For directions on how to set the debug port clock frequency, see CodeWarrior documentation.

Some slow target systems might not be able to operate at the initial default rate. Therefore, you may have to adjust the debug port clock rate.

Note: Because of variations in the design of target systems, it is not possible to guarantee that all systems can be operated at the maximum debug port clock rates. These variations include circuit impedances, trace lengths, and signal terminations. You may need to select a lower clock rate to get reliable operation.