Kinetis Memory Map and Linker Considerations

For Kinetis devices, the on-chip SRAM is split into two equally-sized logical arrays. The memory buffer and structure ranges can not span across this 0x1FFF_FFFF...0x2000_0000 SRAM boundary.

Figure 1. SRAM Blocks Memory Map

The Kinetis default linker command files are modified to warn users in such scenarios. However, users need to change their flash based applications accordingly.