The ARM compiler generates a BL <symbolname> instruction whenever a function call is encountered in the source, being compiled. The BL instruction in both ARM and Thumb modes has a fixed offset that determines the maximum range of the branch target jump. At link time, the linker determines the operating state of the caller function (ARM or Thumb), the operating state of the callee, and the range of the jump. If the interworking switch of the linker is on, the linker either replaces the compiler generated BL instruction with a BLX instruction (to switch operating states) or replaces the target of the BL instruction with a branch to a small piece of code called a veneer. The veneer will switch operating states if necessary and branch to the original target. Veneers are generated if a state switch is required or if the branch is out of the range of the BL instruction. The exact contents of the veneer depend on the ARM architecture type and capabilities (v4t or v5t). The features requested will force the compiler to generate a fixed sequence of instructions that allow a branch range of 32-bits using the BLX Rm for ARM v5t or BX Rm for ARM v4t. In this specification, such functions that require register direct branching instructions are referred to as "far" functions.