ࡱ>    Root Entry ppvCache  Cells pspsParts psps OrCAD Windows Library NQmQ"Arial+x BlockModify1Courier New BlockModify1ST PART FIELD2ND PART FIELD3RD PART FIELD4TH PART FIELD5TH PART FIELD6TH PART FIELD7TH PART FIELD PCB Footprintddd00Views pspsLibrary6Symbolspsps$Types$CLASSICPart ReferenceValuemQMK50DN512ZCLL10_LQFP100b&p}mQMK50DN512ZCLL10_LQFP100.Normalb&p}mQmQmQGraphics psps$Types$PackagespspsExportBlocks pspsCells Directory  6Parts Directory   =Views Directory  NetBundleMapData"  Symbols Directory$Graphics Directory&Packages Directory&6ExportBlocks Directory.mQMK50DN512ZCLL10_LQFP100b&p}mQMK50DN512ZCLL10_LQFP1000 *]1 \9MK50DN512ZCLL10_LQFP100MK50DN512ZCLL10_LQFP100.Normal6''@\9MK50DN512ZCLL10_LQFP100.Normal0(( vvdx \9CPTA0/JTAG_TCLK/SWD_CLK/EZP_CLK/TSI0_CH1/U\A\R\T\0\_\C\T\S\/FTM0_CH522!d \9/PTA1/JTAG_TDI/EZP_DI/TSI0_CH2/UART0_RX/FTM0_CH6<<!n \99PTA2/JTAG_TDO/TRACE_SWO/EZP_DO/TSI0_CH3/UART0_TX/FTM0_CH7FF!o \9:PTA3/JTAG_TMS/SWD_DIO/TSI0_CH4/U\A\R\T\0\_\R\T\S\/FTM0_CH0PP!g \92PTA4/LLWU_P3/TSI0_CH5/FTM0_CH1/N\M\I\/E\Z\P\_\C\S\ZZ!a \9,PTA12/CMP2_IN0/FTM1_CH0/I2S0_TXD/FTM1_QD_PHAdd!k \96PTA13/LLWU_P4/CMP2_IN1/FTM1_CH1/I2S0_TX_FS/FTM1_QD_PHBnn!Z \9%PTA14/SPI0_PCS0/UART0_TX/I2S0_TX_BCLKxx!U \9 PTA15/SPI0_SCK/UART0_RX/I2S0_RXD!U \9 PTA18/EXTAL/FTM0_FLT2/FTM_CLKIN0!^ \9)PTA19/XTAL/FTM1_FLT0/FTM_CLKIN1/LPT0_ALT1!z \9EPTB0/LLWU_P5/ADC0_SE8/ADC1_SE8/TSI0_CH0/I2C0_SCL/FTM1_CH0/FTM1_QD_PHA!r \9=PTB1/ADC0_SE9/ADC1_SE9/TSI0_CH6/I2C0_SDA/FTM1_CH1/FTM1_QD_PHB!r \9=PTB2/ADC0_SE12/TSI0_CH7/I2C0_SCL/U\A\R\T\0\_\R\T\S\/FTM0_FLT3!r \9=PTB3/ADC0_SE13/TSI0_CH8/I2C0_SDA/U\A\R\T\0\_\C\T\S\/FTM0_FLT0!^ \9)PTB9/SPI1_PCS1/U\A\R\T\3\_\C\T\S\/FB_AD20!i \94PTB10/ADC1_SE14/SPI1_PCS0/UART3_RX/FB_AD19/FTM0_FLT1!h \93PTB11/ADC1_SE15/SPI1_SCK/UART3_TX/FB_AD18/FTM0_FLT2!e \90PTB16/TSI0_CH9/SPI1_SOUT/UART0_RX/FB_AD17/EWM_IN!m \98PTB17/TSI0_CH10/SPI1_SIN/UART0_TX/FB_AD16/E\W\M\_\O\U\T\!n \99PTB18/TSI0_CH11/FTM2_CH0/I2S0_TX_BCLK/FB_AD15/FTM2_QD_PHA!o \9:PTB19/TSI0_CH12/FTM2_CH1/I2S0_TX_FS/F\B\_\O\E\/FTM2_QD_PHB!U \9 PTB20/SPI2_PCS0/FB_AD31/CMP0_OUT""!T \9PTB21/SPI2_SCK/FB_AD30/CMP1_OUT,,!U \9 PTB22/SPI2_SOUT/FB_AD29/CMP2_OUT66!U \9 PTB23/SPI2_SIN/SPI0_PCS5/FB_AD28@@!i \94ADC0_SE16/OP0_OUT/CMP1_IN2/ADC0_SE21/OP0_DP1/OP1_DP1^^!i \94ADC1_SE16/OP1_OUT/CMP2_IN2/ADC0_SE22/OP0_DP2/OP1_DP2hh!: \9VREFH!? \9 R\E\S\E\T\D D!U \9 PTE5/SPI1_PCS2/UART3_RX/SDHC0_D2 !] \9(PTE4/LLWU_P2/SPI1_PCS0/UART3_TX/SDHC0_D3 !i \94PTE3/ADC1_SE7A/SPI1_SIN/U\A\R\T\1\_\R\T\S\/SDHC0_CMD !r \9=PTE2/LLWU_P1/ADC1_SE6A/SPI1_SCK/U\A\R\T\1\_\C\T\S\/SDHC0_DCLK !p \9;PTE1/LLWU_P0/ADC1_SE5A/SPI1_SOUT/UART1_RX/SDHC0_D0/I2C1_SCL !/h \93PTE0/ADC1_SE4A/SPI1_PCS1/UART1_TX/SDHC0_D1/I2C1_SDA !/] \9(PTD7/CMT_IRO/UART0_TX/FTM0_CH7/FTM0_FLT1T T!.y \9DPTD6/LLWU_P15/ADC0_SE7B/SPI0_PCS3/UART0_RX/FTM0_CH6/FB_AD0/FTM0_FLT0J J! \9JPTD5/ADC0_SE6B/SPI0_PCS2/U\A\R\T\0\_\C\T\S\/FTM0_CH5/FB_AD1/E\W\M\_\O\U\T\@ @!v \9APTD4/LLWU_P14/SPI0_PCS1/U\A\R\T\0\_\R\T\S\/FTM0_CH4/FB_AD2/EWM_IN6 6!,R \9PTD3/SPI0_SIN/UART2_TX/FB_AD3, ,!,\ \9'PTD2/LLWU_P13/SPI0_SOUT/UART2_RX/FB_AD4" "!+l \97PTD1/ADC0_SE5B/SPI0_SCK/U\A\R\T\2\_\C\T\S\/F\B\_\C\S\0\ !~ \9IPTD0/LLWU_P12/SPI0_PCS0/U\A\R\T\2\_\R\T\S\/FB_ALE/F\B\_\C\S\1\/F\B\_\T\S\ ! \9YPTC18/U\A\R\T\3\_\R\T\S\/F\B\_\T\B\S\T\/F\B\_\C\S\2\/F\B\_\B\E\1\5\_\8\_\B\L\S\2\3\_\1\6\ !)9 \9VDD2TT!)9 \9VDD3^^!(9 \9VDD4hh!)9 \9VDD5rr!9 \9VSS1@v@!&9 \9VSS2JvJ!%9 \9VSS3TvT!&9 \9VSS4^v^!9 \9VSS5hvh!9 \9VDDA!"9 \9VSSAv!#: \9VREFLv!$s \9>PTC0/ADC0_SE14/TSI0_CH13/SPI0_PCS4/PDB0_EXTRG/I2S0_TXD/FB_AD142 2!! \9NPTC1/LLWU_P6/ADC0_SE15/TSI0_CH14/SPI0_PCS3/U\A\R\T\1\_\R\T\S\/FTM0_CH0/FB_AD13< <!  \9OPTC2/ADC0_SE4B/CMP1_IN0/TSI0_CH15/SPI0_PCS2/U\A\R\T\1\_\C\T\S\/FTM0_CH1/FB_AD12F F!p \9;PTC3/LLWU_P7/CMP1_IN1/SPI0_PCS1/UART1_RX/FTM0_CH2/FB_CLKOUTP P!$n \99PTC4/LLWU_P8/SPI0_PCS0/UART1_TX/FTM0_CH3/FB_AD11/CMP1_OUTZ Z!!e \90PTC5/LLWU_P9/SPI0_SCK/LPT0_ALT2/FB_AD10/CMP0_OUTd d!>g \92PTC6/LLWU_P10/CMP0_IN0/SPI0_SOUT/PDB0_EXTRG/FB_AD9n n!=R \9PTC7/CMP0_IN1/SPI0_SIN/FB_AD8x x!=h \93PTC8/ADC1_SE4B/CMP0_IN2/I2S0_MCLK/I2S0_CLKIN/FB_AD7 !=j \95PTC9/ADC1_SE5B/CMP0_IN3/I2S0_RX_BCLK/FB_AD6/FTM2_FLT0 !>h \93PTC10/ADC1_SE6B/CMP0_IN4/I2C1_SCL/I2S0_RX_FS/FB_AD5 !;j \95PTC11/LLWU_P11/ADC1_SE7B/I2C1_SDA/I2S0_RXD/F\B\_\R\W\ !:U \9 PTC12/U\A\R\T\4\_\R\T\S\/FB_AD27 !:U \9 PTC13/U\A\R\T\4\_\C\T\S\/FB_AD26 !:K \9PTC14/UART4_RX/FB_AD25 !;K \9PTC15/UART4_TX/FB_AD24 !~ \9IPTC16/UART3_RX/F\B\_\C\S\5\/FB_TSIZ1/F\B\_\B\E\2\3\_\1\6\_\B\L\S\1\5\_\8\ !7x \9CPTC17/UART3_TX/F\B\_\C\S\4\/FB_TSIZ0/F\B\_\B\E\3\1\_\2\4\L\S\7\_\0\ !7; \9XTAL32!;< \9EXTAL32!89 \9VDD1JJ!E \9ADC0_DM1/OP0_DM0!4M \9ADC1_DP1/OP1_DP0/OP1_DM1!4N \9PGA0_DP/ADC0_DP0/ADC1_DP3!9E \9ADC1_DM1/OP1_DM0!6N \9PGA0_DM/ADC0_DM0/ADC1_DM3!< \9USB0_DPNN!N \9PGA1_DP/ADC1_DP0/ADC0_DP3!1N \9PGA1_DM/ADC1_DM0/ADC0_DM3!0< \9TRI0_DP!1< \9TRI0_DM!$< \9TRI1_DP00!2< \9TRI1_DM::!N< \9USB0_DMXX!2E \9ADC0_DP1/OP0_DP0!N; \9VREGINX X!; \9VOUT33b b!9 \9VBAT66!E \9TRI0_OUT/OP1_DM2 !P \9TRI1_OUT/CMP2_IN5/ADC1_SE22 !Y \9$VREF_OUT/CMP1_IN5/CMP0_IN5/ADC1_SE18 !FPorm` \9+DAC0_OUT/CMP1_IN3/ADC0_SE23/OP0_DP4/OP1_DP4||!IB.OL` \9+DAC1_OUT/CMP2_IN3/ADC1_SE23/OP0_DP5/OP1_DP5!50ZCL'"' '\90'"' '\90U1 \9MK50DN512ZCLL10_LQFP100U  \9MK50DN512ZCLL10_LQFP100d394041424344454647505153545556575859626364656667686926252252654321100999897969594939248617589849607488212423707172737677787980818283848586879091363771415171618919203029323110131211382833273435