LPCOpen Platform for LPC112X microcontrollers
112X
LPCOpen Platform for the NXP LPC112X family of Microcontrollers
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cmsis.h
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/*
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* @brief Basic CMSIS include file for LPC112x
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*
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* @note
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* Copyright(C) NXP Semiconductors, 2013
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* All rights reserved.
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*
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* @par
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* LPC products. This software is supplied "AS IS" without any warranties of
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* any kind, and NXP Semiconductors and its licensor disclaim any and
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* all warranties, express or implied, including all implied warranties of
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* merchantability, fitness for a particular purpose and non-infringement of
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* intellectual property rights. NXP Semiconductors assumes no responsibility
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* or liability for the use of the software, conveys no license or rights under any
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* patent, copyright, mask work right, or any other intellectual property rights in
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* or to any products. NXP Semiconductors reserves the right to make changes
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* in the software without notification. NXP Semiconductors also makes no
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* representation or warranty that such application will be suitable for the
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* specified use without further testing or modification.
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*
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* @par
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* Permission to use, copy, modify, and distribute this software and its
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* documentation is hereby granted, under NXP Semiconductors' and its
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* licensor's relevant copyrights in the software, without fee, provided that it
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* is used in conjunction with NXP Semiconductors microcontrollers. This
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* copyright, permission, and disclaimer notice must appear in all copies of
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* this code.
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*/
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#ifndef __CMSIS_H_
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#define __CMSIS_H_
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#include "
lpc_types.h
"
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#include "
sys_config.h
"
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#ifdef __cplusplus
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extern
"C"
{
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#endif
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#if defined(__ARMCC_VERSION)
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// Kill warning "#pragma push with no matching #pragma pop"
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#pragma diag_suppress 2525
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#pragma push
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#pragma anon_unions
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#elif defined(__CWCC__)
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#pragma push
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#pragma cpp_extensions on
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#elif defined(__GNUC__)
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/* anonymous unions are enabled by default */
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#elif defined(__IAR_SYSTEMS_ICC__)
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// #pragma push // FIXME not usable for IAR
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#pragma language=extended
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#else
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#error Not supported compiler type
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#endif
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/*
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* ==========================================================================
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* ---------- Interrupt Number Definition -----------------------------------
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* ==========================================================================
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*/
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typedef
enum
LPC1125_IRQn {
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NonMaskableInt_IRQn
= -14,
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HardFault_IRQn
= -13,
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SVCall_IRQn
= -5,
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PendSV_IRQn
= -2,
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SysTick_IRQn
= -1,
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PIO0_0_IRQn
= 0,
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PIO0_1_IRQn
= 1,
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PIO0_2_IRQn
= 2,
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PIO0_3_IRQn
= 3,
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PIO0_4_IRQn
= 4,
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PIO0_5_IRQn
= 5,
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PIO0_6_IRQn
= 6,
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PIO0_7_IRQn
= 7,
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PIO0_8_IRQn
= 8,
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PIO0_9_IRQn
= 9,
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PIO0_10_IRQn
= 10,
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PIO0_11_IRQn
= 11,
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PIO1_0_IRQn
= 12,
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ADC_B_IRQn
= 13,
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SSP1_IRQn
= 14,
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I2C_IRQn
= 15,
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I2C0_IRQn
=
I2C_IRQn
,
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TIMER_16_0_IRQn
= 16,
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TIMER_16_1_IRQn
= 17,
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TIMER_32_0_IRQn
= 18,
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TIMER_32_1_IRQn
= 19,
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SSP0_IRQn
= 20,
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UART0_IRQn
= 21,
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UART1_IRQn
= 22,
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UART2_IRQn
= 23,
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ADC_A_IRQn
= 24,
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WDT_IRQn
= 25,
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BOD_IRQn
= 26,
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Reserved27_IRQn
= 27,
111
PIO3_IRQn
= 28,
112
PIO2_IRQn
= 29,
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PIO1_IRQn
= 30,
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PIO0_IRQn
= 31,
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}
LPC1125_IRQn_Type
;
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/*
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* ==========================================================================
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* ----------- Processor and Core Peripheral Section ------------------------
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* ==========================================================================
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*/
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/* Configuration of the Cortex-M0 Processor and Core Peripherals */
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#define __MPU_PRESENT 0
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#define __NVIC_PRIO_BITS 2
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#define __Vendor_SysTickConfig 0
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typedef LPC1125_IRQn_Type IRQn_Type;
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/* Cortex-M0 processor and core peripherals */
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#include "core_cm0.h"
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#ifdef __cplusplus
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}
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#endif
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#endif
/* __CMSIS_1125_H_ */
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