LPCOpen Platform for LPC112X microcontrollers  112X
LPCOpen Platform for the NXP LPC112X family of Microcontrollers
uart_112x.h
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1 /*
2  * @brief LPC1125 UART chip driver
3  *
4  * @note
5  * Copyright(C) NXP Semiconductors, 2012
6  * All rights reserved.
7  *
8  * @par
9  * Software that is described herein is for illustrative purposes only
10  * which provides customers with programming information regarding the
11  * LPC products. This software is supplied "AS IS" without any warranties of
12  * any kind, and NXP Semiconductors and its licensor disclaim any and
13  * all warranties, express or implied, including all implied warranties of
14  * merchantability, fitness for a particular purpose and non-infringement of
15  * intellectual property rights. NXP Semiconductors assumes no responsibility
16  * or liability for the use of the software, conveys no license or rights under any
17  * patent, copyright, mask work right, or any other intellectual property rights in
18  * or to any products. NXP Semiconductors reserves the right to make changes
19  * in the software without notification. NXP Semiconductors also makes no
20  * representation or warranty that such application will be suitable for the
21  * specified use without further testing or modification.
22  *
23  * @par
24  * Permission to use, copy, modify, and distribute this software and its
25  * documentation is hereby granted, under NXP Semiconductors' and its
26  * licensor's relevant copyrights in the software, without fee, provided that it
27  * is used in conjunction with NXP Semiconductors microcontrollers. This
28  * copyright, permission, and disclaimer notice must appear in all copies of
29  * this code.
30  */
31 
32 #ifndef __UART_1125_H_
33 #define __UART_1125_H_
34 
35 #include "ring_buffer.h"
36 
37 #ifdef __cplusplus
38 extern "C" {
39 #endif
40 
49 typedef struct {
51  union {
52  __IO uint32_t DLL;
53  __O uint32_t THR;
54  __I uint32_t RBR;
55  };
56 
57  union {
58  __IO uint32_t IER;
59  __IO uint32_t DLM;
60  };
61 
62  union {
63  __O uint32_t FCR;
64  __I uint32_t IIR;
65  };
66 
67  __IO uint32_t LCR;
68  __IO uint32_t MCR;
69  __I uint32_t LSR;
70  __I uint32_t MSR;
71  __IO uint32_t SCR;
72  __IO uint32_t ACR;
73  __I uint32_t RESERVED0;
74  __IO uint32_t FDR;
75  __I uint32_t RESERVED1;
76  __IO uint32_t TER;
77  __I uint32_t RESERVED2[6];
78  __IO uint32_t RS485CTRL;
79  __IO uint32_t RS485ADRMATCH;
80  __IO uint32_t RS485DLY;
81 } LPC_UART_T;
82 
86 #define UART_RBR_MASKBIT (0xFF)
91 #define UART_LOAD_DLL(div) ((div) & 0xFF)
92 #define UART_DLL_MASKBIT (0xFF)
97 #define UART_LOAD_DLM(div) (((div) >> 8) & 0xFF)
98 #define UART_DLM_MASKBIT (0xFF)
103 #define UART_IER_RBRINT (1 << 0)
104 #define UART_IER_THREINT (1 << 1)
105 #define UART_IER_RLSINT (1 << 2)
106 #define UART_IER_MSINT (1 << 3)
107 #define UART_IER_CTSINT (1 << 7)
108 #define UART_IER_ABEOINT (1 << 8)
109 #define UART_IER_ABTOINT (1 << 9)
110 #define UART_IER_BITMASK (0x307)
111 #define UART1_IER_BITMASK (0x30F)
112 #define UART2_IER_BITMASK (0x38F)
117 #define UART_IIR_INTSTAT_PEND (1 << 0)
118 #define UART_IIR_FIFO_EN (3 << 6)
119 #define UART_IIR_ABEO_INT (1 << 8)
120 #define UART_IIR_ABTO_INT (1 << 9)
121 #define UART_IIR_BITMASK (0x3CF)
123 /* Interrupt ID bit definitions */
124 #define UART_IIR_INTID_MASK (7 << 1)
125 #define UART_IIR_INTID_RLS (3 << 1)
126 #define UART_IIR_INTID_RDA (2 << 1)
127 #define UART_IIR_INTID_CTI (6 << 1)
128 #define UART_IIR_INTID_THRE (1 << 1)
129 #define UART_IIR_INTID_MODEM (0 << 1)
134 #define UART_FCR_FIFO_EN (1 << 0)
135 #define UART_FCR_RX_RS (1 << 1)
136 #define UART_FCR_TX_RS (1 << 2)
137 #define UART_FCR_DMAMODE_SEL (1 << 3)
138 #define UART_FCR_BITMASK (0xCF)
140 #define UART_TX_FIFO_SIZE (16)
141 
142 /* FIFO trigger level bit definitions */
143 #define UART_FCR_TRG_LEV0 (0)
144 #define UART_FCR_TRG_LEV1 (1 << 6)
145 #define UART_FCR_TRG_LEV2 (2 << 6)
146 #define UART_FCR_TRG_LEV3 (3 << 6)
151 /* UART word length select bit definitions */
152 #define UART_LCR_WLEN_MASK (3 << 0)
153 #define UART_LCR_WLEN5 (0 << 0)
154 #define UART_LCR_WLEN6 (1 << 0)
155 #define UART_LCR_WLEN7 (2 << 0)
156 #define UART_LCR_WLEN8 (3 << 0)
158 /* UART Stop bit select bit definitions */
159 #define UART_LCR_SBS_MASK (1 << 2)
160 #define UART_LCR_SBS_1BIT (0 << 2)
161 #define UART_LCR_SBS_2BIT (1 << 2)
163 /* UART Parity enable bit definitions */
164 #define UART_LCR_PARITY_EN (1 << 3)
165 #define UART_LCR_PARITY_DIS (0 << 3)
166 #define UART_LCR_PARITY_ODD (0 << 4)
167 #define UART_LCR_PARITY_EVEN (1 << 4)
168 #define UART_LCR_PARITY_F_1 (2 << 4)
169 #define UART_LCR_PARITY_F_0 (3 << 4)
170 #define UART_LCR_BREAK_EN (1 << 6)
171 #define UART_LCR_DLAB_EN (1 << 7)
172 #define UART_LCR_BITMASK (0xFF)
177 #define UART_MCR_DTR_CTRL (1 << 0)
178 #define UART_MCR_RTS_CTRL (1 << 1)
179 #define UART_MCR_LOOPB_EN (1 << 4)
180 #define UART_MCR_AUTO_RTS_EN (1 << 6)
181 #define UART_MCR_AUTO_CTS_EN (1 << 7)
182 #define UART_MCR_BITMASK (0xD3)
187 #define UART_LSR_RDR (1 << 0)
188 #define UART_LSR_OE (1 << 1)
189 #define UART_LSR_PE (1 << 2)
190 #define UART_LSR_FE (1 << 3)
191 #define UART_LSR_BI (1 << 4)
192 #define UART_LSR_THRE (1 << 5)
193 #define UART_LSR_TEMT (1 << 6)
194 #define UART_LSR_RXFE (1 << 7)
195 #define UART_LSR_TXFE (1 << 8)
196 #define UART_LSR_BITMASK (0xFF)
197 #define UART1_LSR_BITMASK (0x1FF)
202 #define UART_MSR_DELTA_CTS (1 << 0)
203 #define UART_MSR_DELTA_DSR (1 << 1)
204 #define UART_MSR_LO2HI_RI (1 << 2)
205 #define UART_MSR_DELTA_DCD (1 << 3)
206 #define UART_MSR_CTS (1 << 4)
207 #define UART_MSR_DSR (1 << 5)
208 #define UART_MSR_RI (1 << 6)
209 #define UART_MSR_DCD (1 << 7)
210 #define UART_MSR_BITMASK (0xFF)
215 #define UART_ACR_START (1 << 0)
216 #define UART_ACR_MODE (1 << 1)
217 #define UART_ACR_AUTO_RESTART (1 << 2)
218 #define UART_ACR_ABEOINT_CLR (1 << 8)
219 #define UART_ACR_ABTOINT_CLR (1 << 9)
220 #define UART_ACR_BITMASK (0x307)
225 #define UART_RS485CTRL_NMM_EN (1 << 0)
226 #define UART_RS485CTRL_RX_DIS (1 << 1)
227 #define UART_RS485CTRL_AADEN (1 << 2)
228 #define UART_RS485CTRL_SEL_DTR (1 << 3)
230 #define UART_RS485CTRL_DCTRL_EN (1 << 4)
231 #define UART_RS485CTRL_OINV_1 (1 << 5)
234 #define UART_RS485CTRL_BITMASK (0x3F)
239 #define UART_ICR_IRDAEN (1 << 0)
240 #define UART_ICR_IRDAINV (1 << 1)
241 #define UART_ICR_FIXPULSE_EN (1 << 2)
242 #define UART_ICR_PULSEDIV(n) ((n & 0x07) << 3)
243 #define UART_ICR_BITMASK (0x3F)
248 #define UART_HDEN_HDEN ((1 << 0))
253 #define UART_SCICTRL_SCIEN (1 << 0)
254 #define UART_SCICTRL_NACKDIS (1 << 1)
255 #define UART_SCICTRL_PROTSEL_T1 (1 << 2)
256 #define UART_SCICTRL_TXRETRY(n) ((n & 0x07) << 5)
257 #define UART_SCICTRL_GUARDTIME(n) ((n & 0xFF) << 8)
262 #define UART_FDR_DIVADDVAL(n) (n & 0x0F)
263 #define UART_FDR_MULVAL(n) ((n << 4) & 0xF0)
264 #define UART_FDR_BITMASK (0xFF)
269 #define UART_TER1_TXEN (1 << 7)
270 #define UART_TER2_TXEN (1 << 0)
275 #define UART_SYNCCTRL_SYNC (1 << 0)
276 #define UART_SYNCCTRL_CSRC_MASTER (1 << 1)
277 #define UART_SYNCCTRL_FES (1 << 2)
278 #define UART_SYNCCTRL_TSBYPASS (1 << 3)
279 #define UART_SYNCCTRL_CSCEN (1 << 4)
280 #define UART_SYNCCTRL_STARTSTOPDISABLE (1 << 5)
281 #define UART_SYNCCTRL_CCCLR (1 << 6)
288 STATIC INLINE void Chip_UART_TXEnable(LPC_UART_T *pUART)
289 {
290  pUART->TER = UART_TER1_TXEN;
291 }
292 
299 {
300  pUART->TER = 0;
301 }
302 
311 STATIC INLINE void Chip_UART_SendByte(LPC_UART_T *pUART, uint8_t data)
312 {
313  pUART->THR = (uint32_t) data;
314 }
315 
325 {
326  return (uint8_t) (pUART->RBR & UART_RBR_MASKBIT);
327 }
328 
339 STATIC INLINE void Chip_UART_IntEnable(LPC_UART_T *pUART, uint32_t intMask)
340 {
341  pUART->IER |= intMask;
342 }
343 
354 STATIC INLINE void Chip_UART_IntDisable(LPC_UART_T *pUART, uint32_t intMask)
355 {
356  pUART->IER &= ~intMask;
357 }
358 
368 {
369  return pUART->IER;
370 }
371 
378 {
379  return pUART->IIR;
380 }
381 
392 STATIC INLINE void Chip_UART_SetupFIFOS(LPC_UART_T *pUART, uint32_t fcr)
393 {
394  pUART->FCR = fcr;
395 }
396 
407 STATIC INLINE void Chip_UART_ConfigData(LPC_UART_T *pUART, uint32_t config)
408 {
409  pUART->LCR = config;
410 }
411 
418 {
419  pUART->LCR |= UART_LCR_DLAB_EN;
420 }
421 
428 {
429  pUART->LCR &= ~UART_LCR_DLAB_EN;
430 }
431 
442 STATIC INLINE void Chip_UART_SetDivisorLatches(LPC_UART_T *pUART, uint8_t dll, uint8_t dlm)
443 {
444  pUART->DLL = (uint32_t) dll;
445  pUART->DLM = (uint32_t) dlm;
446 }
447 
456 {
457  return pUART->MCR;
458 }
459 
468 STATIC INLINE void Chip_UART_SetModemControl(LPC_UART_T *pUART, uint32_t mcr)
469 {
470  pUART->MCR |= mcr;
471 }
472 
481 STATIC INLINE void Chip_UART_ClearModemControl(LPC_UART_T *pUART, uint32_t mcr)
482 {
483  pUART->MCR &= ~mcr;
484 }
485 
494 {
495  return pUART->LSR;
496 }
497 
506 {
507  return pUART->MSR;
508 }
509 
516 STATIC INLINE void Chip_UART_SetScratch(LPC_UART_T *pUART, uint8_t data)
517 {
518  pUART->SCR = (uint32_t) data;
519 }
520 
527 {
528  return (uint8_t) (pUART->SCR & 0xFF);
529 }
530 
539 STATIC INLINE void Chip_UART_SetAutoBaudReg(LPC_UART_T *pUART, uint32_t acr)
540 {
541  pUART->ACR |= acr;
542 }
543 
552 STATIC INLINE void Chip_UART_ClearAutoBaudReg(LPC_UART_T *pUART, uint32_t acr)
553 {
554  pUART->ACR &= ~acr;
555 }
556 
565 STATIC INLINE void Chip_UART_SetRS485Flags(LPC_UART_T *pUART, uint32_t ctrl)
566 {
567  pUART->RS485CTRL |= ctrl;
568 }
569 
578 STATIC INLINE void Chip_UART_ClearRS485Flags(LPC_UART_T *pUART, uint32_t ctrl)
579 {
580  pUART->RS485CTRL &= ~ctrl;
581 }
582 
589 STATIC INLINE void Chip_UART_SetRS485Addr(LPC_UART_T *pUART, uint8_t addr)
590 {
591  pUART->RS485ADRMATCH = (uint32_t) addr;
592 }
593 
600 {
601  return (uint8_t) (pUART->RS485ADRMATCH & 0xFF);
602 }
603 
612 STATIC INLINE void Chip_UART_SetRS485Delay(LPC_UART_T *pUART, uint8_t dly)
613 {
614  pUART->RS485DLY = (uint32_t) dly;
615 }
616 
625 {
626  return (uint8_t) (pUART->RS485DLY & 0xFF);
627 }
628 
634 void Chip_UART_Init(LPC_UART_T *pUART);
635 
641 void Chip_UART_DeInit(LPC_UART_T *pUART);
642 
654 int Chip_UART_Send(LPC_UART_T *pUART, const void *data, int numBytes);
655 
666 int Chip_UART_Read(LPC_UART_T *pUART, void *data, int numBytes);
667 
674 uint32_t Chip_UART_SetBaud(LPC_UART_T *pUART, uint32_t baudrate);
675 
687 uint32_t Chip_UART_SetBaudFDR(LPC_UART_T *pUART, uint32_t baud);
688 
698 int Chip_UART_SendBlocking(LPC_UART_T *pUART, const void *data, int numBytes);
699 
710 int Chip_UART_ReadBlocking(LPC_UART_T *pUART, void *data, int numBytes);
711 
722 
733 
745 uint32_t Chip_UART_SendRB(LPC_UART_T *pUART, RINGBUFF_T *pRB, const void *data, int bytes);
746 
758 int Chip_UART_ReadRB(LPC_UART_T *pUART, RINGBUFF_T *pRB, void *data, int bytes);
759 
770 void Chip_UART_IRQRBHandler(LPC_UART_T *pUART, RINGBUFF_T *pRXRB, RINGBUFF_T *pTXRB);
771 
776 #ifdef __cplusplus
777 }
778 #endif
779 
780 #endif /* __UART_1125_H_ */